The present invention relates to audio routing, and more particularly to a digital audio receiver with multi-channel swapping capabilities.
An internationally known standard for the interchange of digital audio is AES3-1992. Under this standard two channels of audio are digitized and then time multiplexed into a single serial digital data stream. This stream contains certain synchronizing symbols, known as preambles, that are used by a receiver of the stream to demultiplex and deserialize the two digital audio channels. Often a device, such as a video tape recorder (VTR), has two AES streams representing four channels of audio. The first stream is generally referred to as AES1/2 and the other stream as AES3/4.
In a broadcast facility a user may connect these signals to the input of a router so that particular sources may be selected for particular destinations. A typical installation may have one portion of the router that deals only with AES1/2 signals on the inputs and outputs and another portion that deals only with AES3/4 signals on the inputs and outputs, as shown in FIG. 1. The user also may want to do "channel swapping"--connecting an AES1/2 source to an AES3/4 destination. To do this the number of crosspoints in the matrix are doubled, as shown in FIG. 2.
A new problem arises when a source is entering an installation and the audio channels, or samples, are not in the right place in the stream. In such a situation the user may wish to swap channels 1 and 3, leaving channels 2 and 4 where they are. In other words the desired output streams of the router for this source are AES3/2 and AES1/4. This requires manipulation of the data stream. Currently this problem may be solved using hardware external to the router, such as some sort of digital audio mixing module. This requires more rack space in the installation as well as a separate means of control.
An existing synchronous digital audio receiver, as shown in FIG. 3, works by having an AES decoder extract clock and audio data information from an AES stream. The extracted clock is used to write the audio data to a first-in/first-out (FIFO) buffer. A system clock is used to read the data from the FIFO. From there the digital data goes to a crosspoint switch and then to an output formatter, the output formatter reassembling the data into an AES stream. The system may use a single FIFO for storing both left and right samples or a separate FIFO for each set of samples. For an example of the use of such receivers refer to U.S. patent application Ser. No. 08/795,213, filed Feb. 5, 1997 by Shuholm et al entitled "Synchronous Switching of Digital Audio While Maintaining Block Alignment."
What is desired is a digital audio receiver with multi-channel swapping capabilities at the input of a router that provides "true channel swapping".